1.
R H, Tune HN, Lepcha D, ugli OMB. Co-Designing Neural Architectures And Hardware Accelerators For Maximum Inference Efficiency. IJAIML [Internet]. 2026 Jun. 1 [cited 2026 Aug. 24];6(4s):476-80. Available from: https://svedbergopen.com/index.php/ijaiml/article/view/477